1. Field
Exemplary embodiments of the present invention relate to a memory design technology, and more particularly, to a memory device and a memory system including the same.
2. Description of the Related Art
A memory device such as a dynamic random access memory (DRAM) receives data, which is to be written, from a controller and transmits data, which is read therefrom, to the controller. In case of a synchronous memory device, the controller and the memory device are synchronized with a system clock. During the transmission of data, a data strobe signal is used to synchronize the controller and the memory device for data communication.
Especially, the memory device performs a toggling operation to synchronize the data with an edge of the data strobe signal. The toggling operation is performed on the data irrespective of a type of data. For example, although the data have a predetermined pattern of “all one” or “all zero”, e.g., ‘11111’ or ‘00000’, the memory device performs the toggle operation, which causes power consumption.